Electronics: DC Bias Analysis for Common Emitter Transistor Circuit 1

This article focuses on the DC bias of a transistor in the common emitter circuit shown in figure one. The collector current versus collector-emitter voltage graph is shown in figure two. This graph shows the common emitter transistor characteristics.

The DC bias defines the DC operating point of the transistor. The DC operating point is also known as the Quiescent Point.

The transistor could be in one of the three states: the active state, the saturation state or the cut off state.

In the active state the base-emitter junction is forward biased and the base collector junction is reverse biased. The active region shown in Figure two gives us collector current, collector to emitter voltage and base current. The DC operating point is in this region for most analog transistor circuits. In figure two, this is the region to the left of the "Vc (sat)" vertical line and above the horizontal line labeled "Ib = 0."

In the saturation state, the base emitter junction is forward biased and the base collector junction is forward biased. In figure two, this is the region to the right of the "Vc (sat)" vertical line. Note that "Vc (sat)" is associated with "Ib (sat)" at the DC load line.

In the cut off state, the base emitter junction is not forward biased and the base collector is reverse biased. The base current is zero amperes and consequently no collector current flows. In figure two, this is the region below the "Ib = 0" horizontal line.

In figure two the diagonal line extending from "Vcc/(R1+R2)" to "Vcc" is the DC load line. The quiescent point is labeled the Q Point in figure two. Note that the Q point defines the collector-emitter voltage and the collector current for the circuit in Figure One. Also note that the Quiescent Point is in the active region.

The point of saturation is dependent on the values of the resistors R1 and R2, and the voltages at the base, emitter and collector of the transistor.

The collector voltage Vc is equal to:

Vc = Vcc - Ic*R1

where Vc is the voltage at the collector of the transistor and

Ic is the collector current through R1.

HFE is the DC current gain.

The collector current is the product of the DC current gain HFE and the base current Ib.

Equation One

Ic = HFE * Ib

The resistor R2 is intended to swamp out the variations in the current gain HFE.

Let Ie be the current through R2

The ratio of collector current to emitter current is known as the DC alpha.

The DC alpha is also known as HFB

HFB = Ic/Ie = Ic/(Ic + Ib)

Ib is tiny when compared to Ic. Assuming that HFB is very close to one, the total current through R2 is the sum of the base current and the collector current

Ie = Ic + Ib

We could analyze this circuit using two equations.

We generate the first equation by summing the voltages around the loop containing Vcc, R1, Vce and R2.

Lets start at point A in Figure one and proceed counter-clockwise around the loop.

Equation Two

0 = -Vcc + Ic*R1 + Vce + (Ic + Ib)*R2

Now we generate an equation for loop containing Vbb, R3, Vbe, and R2.

Vbe is the voltage across the base emitter junction.

Lets start at point B and sum the voltages around the loop.

Equation Three

0 = -Vbb + Ib*R3 + Vbe + (Ib + Ic)*R2

Lets substitute equation one for Ic in equation two

Equation One is

Ic = HFE * Ib

Equation Two is

0 = -Vcc + Ic*R1 + Vce + (Ic + Ib)*R2

Substituting equation one into equation two we have

0 = -Vcc + Ic*R1 + Vce + ((HFE*Ib) + Ib)*R2

Factoring the expression ((HFE*Ib) + Ib)*R2 we get

Equation Four

0 = -Vcc + Ic*R1 + Vce + (Ib * (1 + HFE) * R2)

Doing the same substitution for equation three

0 = -Vbb + Ib*R3 + Vbe + (Ib + Ic)*R2

we have

0 = -Vbb + Ib*R3 + Vbe + (Ib * (1 + HFE) * R2)

Now we are dealing with one current making it easier to analyze this DC biased circuit.

If we have the values of the resistors R1, R1 and R3 and we need to determine which state the transistor is in, we could replace the transistor in figure one with the equivalent shown in figure three. Looking at figure three we see that the voltage Vce is actually the sum of the voltage from collector to base Vcb and the voltage from base to emitter Vbe.

Equation Five.

Vce = Vcb + Vbe

Hence if we substitute equation five into equation four ...

0 = -Vcc + Ic*R1 + Vce + (Ib * (1 + HFE) * R2)

becomes equation six

0 = -Vcc + Ic*R1 + Vcb + Vbe + (Ib * (1 + HFE) * R2)

where Vcb is the voltage from collector to base.

and Vbe is the voltage from base to emitter.

Equation six allows us to determine the state of the transistor because it contains the base to collector voltage and the base to emitter voltage.

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What happens as we increase the value of R1?

We learned earlier that the collector voltage Vc is equal to

Equation Seven

Vc = Vcc - Ic*R1

The base collector junction of the transistor is reversed biased long as the collector voltage is more positive than the base voltage.

The collector current is

Ic = HFE * Ib

This is true as long as the DC power supply Vcc is capable of providing the current and voltage.

Assuming the power supply is able to provide the current and voltage and assuming that the base current Ib is constant; the greater the resistance of R1, the lower the collector voltage. This could be determined by examining equation seven.

Vc = Vcc - Ic*R1

There obviously is a value of R1 which will cause the collector voltage to be less positive than the base voltage. When the collector voltage is less positive than the base voltage, the base collector junction is forward biased and the transistor is in the state of saturation.

We should set the resistance of R1 so that the collector current is the value at the quiescent point in figure two. We could use the graph in figure two to find the base current at the quiescent point.

If the transistor circuit will be used to amplify an analog signal, then the Q Point should be set in the active region as shown in figure two. This allows for variations of base current that will not cause the transistor to enter the cutoff state. Likewise, we pick a value of R1 that will not allow the transistor to enter the saturation state. Hence the variations in the base current and collector current keep the transistor in the active state so that the output signal will be an amplified reproduction of the input signal.

Figure Two shows the saturation point at Vc/(R1+ R2). The saturation point is at a lower current value than it would be if R2 were not in the circuit. The reason becomes obvious when we increase the value of R2 while holding the base current constant. The total current through R2 will not change. However the product of the total current through R2 and the resistance R2 will increase. The voltage at the emitter increases and this in turn means that the voltage at the base of the transistor will increase. Hence the voltage drop from collector to base of the transistor will decrease. Although we retained the quiescent point and the currents associated with the quiescent point, our quiescent point is closer to saturation.

This concludes this article on DC bias.

References:

I have a Bachelor of Science In Electrical Engineering and worked as an Electronics Technician.

Electronic Principles: Third Edition
ISBN 0-07-039912-3