Microprocessors

The CPU is the brain of the computer, though it is more idiot savant than genius.
A CPU uses a communication device called an external data bus (EDB). The external data bus uses on/off patterns to represent pieces of data or commands. The EDB consists of little wires on the CPU, and voltage is applied to individual wires to turn them on. The on/off pattern is represented by binary, with 1 meaning on and 0 meaning off. On off on on off off on what does the represented by 1011001.
A series of these switches is called a register. The four most common registers are the general-purpose registers. Intel calls them a AX, BX, CX, and DX. These registers function like work tables for commands provided by the EDB
To signal a command to process, a charge is placed on a special wire call the clock wire. Each charge is called a clock cycle the number of clock cycles in a given period of time is called the clock speed. Clock speed is the fastest speed at which a CPU can operate. The system crystal is a quartz (usually) oscillator that functions as a metronome that sets the clock speed. In modern systems, the CPU and forms the motherboard of the proper clock speed.
Programs are stored on the hard drive, but hard drives are not fast enough to keep up with the CPU, even the older CPUs. This is where RAM (random access memory) comes into play. RAM copies the program from the hard drive and sends it to the CPU at a rate fast enough to keep up with the CPU's demands.
Memory must do more than simply store program information. It was also store the results of calculations and be able to handle branches such as IF statements. The CPU must be able to read from and write to the memory. It must be able to access any line of code as easily as any other, which is where the "random"of random access memory comes into play. And it must do this at near the CPU's clock speed. RAM functions like a spreadsheet.
The type of RAM computers use is called dynamic RAM, or DRAM. It requires a constant electrical charge and must be periodically refreshed. This can cause occasional delays.
The CPU and RAM talk to each other via the EDB. The external data bus is extended from the CPU to the RAM. The EDB is connected in a manner that allows the CPU to see any one given row, but also allows the CPU to look in any row. The CPU states row it wants, and the RAM provides information in that row. This is handled by the memory controller chip.
A second set of wires called the address bus tells the memory controller chip which line of code is desired, and the memory controller chip returns the information via the EDB.
The number of wires in the address bus determines the amount of RAM a chip can handle 20 wires means the chip can handle two to the 20th power or 1,048,576 combinations, thus they can handle 1,048,576 bytes of RAM.
The arithmetic logic unit is the part of the CPU that performs basic arithmetic functions for the computer.
There is only limited interchangeability was CPUs.
Modern CPUs use nearly 100 varieties of the pin grid array package, such he ball grid array and the land grid array. CPUs snap and a special sockets on the motherboard called zero force insertion sockets.
It requires at least four steps for the CPU to process information. First the data must be retrieved from the EDB. Then the data must be decoded. The calculation must then be executed. The data is then sent back on the EDB. Rther than let portions of the CPUs idle waiting for each process to complete, the CPU functions as a conveyor belt or assembly line. Modern CPUs can also redirect the assembly line on some commands to prevent stalls due to more complex processes. Most CPUs now have around eight pipelines to prevent stalls.
Programs break down the smaller pieces, called threads, and data. If thread is a series of instructions that there's a particular job with the data
wait states occur with the CPU runs faster than the RAM can supply it with code. To live in a way states, CPUs have built-in, very high-speed static RAM (SRAM). The SRAM preloads instructions and data that may be used again. This is called a cache. Some CPUs have three caches. A small cache paired with a larger cache is more efficient than a single large cache. The CPU searches the level I cache, then level II cache, and level III cache.
Branch prediction allows the CPU to anticipate program branches and assure the right branch is in the cache.
Modern CPUs run faster than the other chips on the motherboard, and must multiply the clock speed. CPUs thus have two clock speeds, the internal speed and speed runs when talking to the EDB and address bus.
CPUs are a collection of transistors required a set voltage to run correctly. By reducing the voltage needed, size of the transistors could likewise be reduced. More transistors could this be put on the chips. Voltage regulator modules (VRM) death on the voltage for CPUs. Modern voltage regulator modules are integrated and can adjust to fit the voltage needed by the CPU.
Just because a cache may be on-chip doesn't mean it is built into the CPU.
The connection between the CPU, memory controller chip, RAM, the address bus, and EDB is called a front side bus, while the connection between the CPU and the level II cache is the backside bus.
In response to increased graphic needs, CPUs came out with multimedia extensions (MMX).
Modern CPUs require powerful cooling methods to the high heat their wattage produces.
CPUs are made from silicon wafers. Photo lithography is the process used to etch the electrical circuitry onto the wafers.
Laptops require specialized versions of CPUs due to the cramped environments inside the laptop. It must use less power, running at about 75% of the speed in an equivalent desktop processor or it using throttling, CPUs for themselves during low demand times or in case of overheating.
A 64-bit CPU as general-purpose, floating-point, and address registers that are 64-bits wide. The CPUs can handle a max of two of the 64th power bytes of memory or 18,446,744,073,709,551,660 bytes. The measure for this is exactly an Exabyte (2^60), making a 64-bit CPU capable of handling 16 exabytes of RAM.
The address bus is usually clipped down, with an Intel Itanium using 44 bits in AMD's Phenom 2 using 48.